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REX - A VLSI Parasitic Extraction Tool for Electromigration and Signal Analysis ...
http://bach.ece.jhu.edu/~tim/programs/magic/archive/papers/Magic_REX_enhanc
Magic Tutorial #8: Circuit Extraction ...
http://bach.ece.jhu.edu/~tim/programs/magic/archive/papers/tut8.pdf
Magic EXT2SIM(1) - Help - Manual Pages - ext2sim...
http://bear.ces.cwru.edu/eecs_cad/man_ext2sim.html
Magic EXT2SIM(1) - Help - Manual Pages - ext2sim...
http://bear.cwru.edu/eecs_cad/man_ext2sim.html
Accurate Interconnect Modeling: Towards Multi-million Transistor Chips As Microw...
http://citeseer.nj.nec.com/vandermeijs96accurate.html
...
http://courses.cs.tamu.edu/cpsc661/walker/Slides/Circuit_Extraction_1.ppt
ICE: Incremental 3-Dimensional Capacitance and Resistance Extraction for an Iter...
http://csdl.computer.org/comp/proceedings/glsvlsi/1999/0104/00/01040064abs.
Accurate Interconnect Modeling: Towards Multi-million Transistor Chips As Microw...
http://csdl.computer.org/comp/proceedings/iccad/1996/7597/00/75970244abs.ht
Benchmarks for Interconnect Parasitic Resistance and Capacitance...
http://csdl.computer.org/comp/proceedings/isqed/2003/1881/00/18810163abs.ht
Magic Tutorial #8: Circuit Extraction...
http://diglab01.tamuk.edu/tut8.html
REX—a VLSI parasitic extraction tool for electromigration and signal analy...
http://dx.doi.org/10.1145/127601.127757
Multi-GHz interconnect effects in microprocessors...
http://dx.doi.org/10.1145/369691.369743
Product Listing: Physical Verification...
http://ecat.dacafe.com/product_list.php?category_id=1000051
Product Listing: Unknown Listing...
http://ecat.edacafe.com/product_list.php
Magic Tutorial #8: Circuit Extraction ...
http://ece-classweb.ucsd.edu:16080/winter05/ece165/mag_tut/tut8.pdf
The BSIM3 Device Modeling Package ...
http://eesof.viewmark.com/pdf/BSIM3_Admos.pdf
Agilent IC-CAP Extraction Modules...
http://eesof.viewmark.com/products/85190a_modules.html
Delay measurement with RC model ...
http://infoeng.ee.ic.ac.uk/~peterc/teaching/ee4_asic/notes/9-irsim.pdf
LEG - Publications 2003...
http://legwww.epfl.ch/publications03.htm
Liang-Chi Chen's Experiences...
http://poisson.usc.edu/~lichen/Experience.html
Simulation tech supports nanometer silicon designs...
http://rfdesign.com/mag/radio_simulation_tech_supports/
RLE :: Computational Prototyping Group...
http://rleweb.mit.edu/cpg/research_pubs.htm
Publications...
http://rleweb.mit.edu/vlsi/publications.htm
Electronic Engineering Times : Ultima touts 3-D extraction tool. (Ultima Interco...
http://static.highbeam.com/e/electronicengineeringtimes/november241997/ulti
ELE52ETD (6006) ...
http://thor.ee.latrobe.edu.au/~andreja/ele52etd/Notes/S3.1%20Interconnects.
...
http://users.rowan.edu/~head/spring04/vlsi/LVS_EX_AND_BACKAN.doc
ANALYSIS OF POWER SUPPLY NETWORKS ...
http://velox.stanford.edu/papers/ds_thesis.pdf
46.2 ...
http://videos.dac.com/videos/40th/46/46_2/46_2.pdf
Optimal Spacing and Capacitance Padding for General Clock Structures £ ...
http://vlsi.ece.wisc.edu/research/ASP-DAC2001.pdf
884 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEM...
http://vlsi.ece.wisc.edu/research/TCAD2003_INDUCTWISE.pdf
Magic Tutorial #8: Circuit Extraction ...
http://vlsi.olin.edu/materials/magic-tutorial/tut8.pdf
...
http://vsp2.ecs.umass.edu/vspg/658/TA_Tools/cadence/UMASS_README
Interconnect modeling introduction...
http://weewave.mer.utexas.edu/MED_files/MED_research/Intrcncts/Intcnct_ovr_
...
http://www-cad.eecs.berkeley.edu/~nardi/EE219A/lectures/lec24.ppt
To be published: Design Automation Conference, June 2000, Los Angeles, CA. ...
http://www-mtl.mit.edu/Metrology/PAPERS/DAC2000.pdf
Modeling the Effects of Manufacturing Variation on ...
http://www-mtl.mit.edu/Metrology/PAPERS/IEDM98.pdf
Modeling the Effects of Manufacturing Variation on ...
http://www-mtl.mit.edu/Metrology/PAPERS/PAPERS/IEDM98.pdf
Modeling the Effects of Manufacturing Variation on ...
http://www-mtl.mit.edu/Metrology/PAPERS/PAPERS/IEDM98.ps
480 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 23, NO. 3, AUGUST 2000 ...
http://www-tcad.stanford.edu/tcad/pubs/device/advppaper.pdf
480 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 23, NO. 3, AUGUST 2000 ...
http://www-tcad.stanford.edu/~xqi/advppaper.pdf
13. Back-End Design Flow for ...
http://www.altera.com/literature/hb/hrd/hc_h51019.pdf
SPACE...
http://www.analog.co.uk/space.htm
SPACE USER'S MANUAL ...
http://www.analog.co.uk/spaceman.pdf
ApsimDELTA-I ...
http://www.apsimtech.com/Datasheets/ApsimDELTA-I_081603.pdf
Downloadable Calculators and References Pages...
http://www.bychoice.com/~ssalkow/calculators.htm
DATASHEET ...
http://www.cadence.com/datasheets/4916_VirtuosoAMSSA_DSfnl.pdf
DATASHEET ...
http://www.cadence.com/datasheets/AssuraRCX_ds.pdf
DATASHEET ...
http://www.cadence.com/datasheets/dracula.pdf
Celestry Nautilus RC - Full Chip, 3D RC Extraction...
http://www.celestry.com/products_nautilusrc.shtml
Interconnects Modeling - electromagnetic, thermal, mechanical, coupled, parasiti...
http://www.cfdrc.com/bizareas/microelec/rf_dev_inconct/interconnects.html
Ken Shepard...
http://www.cisl.columbia.edu/projects/inductance
CommsDesign - EDA start up rides 'full wave' of signal integrity...
http://www.commsdesign.com/story/OEG20030814S0017
DeepChip Homepage...
http://www.deepchip.com/items/dac04-35.html
I-4.4 Modelling and Verification of Layout-Dependent Effects in VLSI Systems...
http://www.dimes.tudelft.nl/1998/s1/c4/c4-4-vlsimodel.html
Magic Tutorial #8: Circuit Extraction ...
http://www.ece.iit.edu/~jstine/ece429/handouts/tut8.pdf
...
http://www.ece.wisc.edu/~lhe/special_topics_he.htm
EDACafe : Vision Printer Friendly Vresion...
http://www.edavision.com/printer_friendly.php?article=200208/tool.html
Postlayout EDA tools lock onto full-chip verification...
http://www.edn.com/archives/1996/101096/21df_03.htm
EDN - Tool adds high-caliber resistance and capacitance engines - 9/16/2004 - ED...
http://www.edn.com/article/CA451065.html
Delay measurement with RC model ...
http://www.ee.ic.ac.uk/pcheung/teaching/ee4_asic/notes/Lecture%209%20-%20Ci
E ECAD - Tool Details...
http://www.eecad.com/site/tool_details.php?package=45
EEDesign.com - Extraction tool features per-hour licensing...
http://www.eedesign.com/story/showArticle.jhtml?articleID=12807368
EEDesign.com - Silvaco offers full-chip RC extraction...
http://www.eedesign.com/story/showArticle.jhtml?articleID=21400445
Log on in eetasia.com, keeping ahead of the curve of electronics design...
http://www.eetasia.com/ART_8800343438_499481,499490.HTM.4d779fe6
Log on in eetasia.com, keeping ahead of the curve of electronics design...
http://www.eetasia.com/ART_8800347237_499481,499494.HTM.c6fae571
EE Times -Improving Parasitic Extraction Accuracy at 65 nm...
http://www.eetimes.com/in_focus/silicon_engineering/showArticle.jhtml?artic
EE Times -Improving Parasitic Extraction Accuracy at 65 nm...
http://www.eetimes.com/in_focus/silicon_engineering/showArticle?articleID=2
...
http://www.eetimes.com/showArticle.jhtml
EE Times - EDA start up rides 'full wave' of signal integrity...
http://www.eetimes.de/story/OEG20030814S0017
Inductance analysis is key to Avant!'s extraction tools...
http://www.electronicsweekly.com/Article23284.htm
Cadence Enables Motorola with Leading Analog/Mixed-Signal Design Solution...
http://www.embeddedstar.com/pr2002/embedded4005.asp
www.ic.chalmers.se - transistor...
http://www.ic.chalmers.se/?transistor
Parasitic Simulation in Analog Artist 4.x...
http://www.icsl.ucla.edu/aagroup/ee115d/Parasitic_Simulation.html
...
http://www.ihp-ffo.de/cgi-bin/wojtek.cgi
1st Public MULSIC Workshop ...
http://www.iisb.fraunhofer.de/en/arb_geb/mulsic_ws1/mulsic_workshop1_electr
DBLP: Zeyi Wang...
http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/w/Wang:Zeyi.html
LinuxElectrons™: Mentor Graphics Advances Accurate Nanometer Silicon Model...
http://www.linuxelectrons.com/article.php/20040913075959429/print
LinuxElectrons™ - Mentor Graphics Advances Accurate Nanometer Silicon Mode...
http://www.linuxelectrons.com/article.php/20040913075959429
Magma Design Automation, Inc. - QuickCap®...
http://www.magma-da.com/c/@9wImOrVOS7Huk/Pages/QuickCap.html
Magma Design Automation, Inc. - Magma Acquires Random Logic Corporation...
http://www.magma-da.com/c/@UOPKVAf1xtCt6/Pages/PRMergerRandomLogic.html
Calibre Rule Writing...
http://www.mentor.com/training_and_services/training/courses/ic_nanometer_d
MICRO: X architecture marks the spot for good yields, supporters say...
http://www.micromagazine.com/archive/01/07/lead.html
USC-ISI ...
http://www.mosis.com/Faqs/tech_bsim3.pdf
Data Sheet ...
http://www.msc.rl.ac.uk/europractice/vendors/snps_tcad_raphael.pdf
Vertical Silicon Tunnel Diode on High Resistivity Silicon ...
http://www.nd.edu/~qliu/Document/4y0401DRCAbstract.pdf
BSIM3v3 Manual ...
http://www.nikola.com/pdf/bsimset.pdf
Characterization, Parameter Extraction, Calibration...
http://www.nsti.org/procs/MSM99/6
Challenges of Modeling VLSI Interconnects in the DSM Era ...
http://www.nsti.org/publ/MSM2002/343.pdf
OEA International, Inc. - The Gold Standard for Accurate Parasitic Extraction an...
http://www.oea.com/document/cell-an.html
CELL-AN ...
http://www.oea.com/document/cell-an.pdf
Press Release 16...
http://www.oea.com/document/press16.html
Software - Chip Level...
http://www.optem.com/products/inspector.html
Software - Packages...
http://www.optem.com/products/package.html
Accurate Analysis of Multi-Layered Signal and Power Distributions ...
http://www.optimalcorp.com/Support/EPEP2004.pdf
Magic Tutorial #8: Circuit Extraction ...
http://www.owlnet.rice.edu/~elec422/manual/magic_tut/tut8.ps
...
http://www.owlnet.rice.edu/~elec422/manual/man1/ext2sim.txt
...
http://www.planetanalog.com/story/OEG20001024S0010
...
http://www.pulsic.com/lyric_ams.html
MODEL EXTRACTION PROCEDURE FOR InGaP/GaAs HBTs ...
http://www.rawcon.org/rawcon2001/SCherepko.pdf
Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors...
http://www.research.ibm.com/journal/rd/414/shepard.html
RUBICAD Technology & Products...
http://www.rubicad.net/solutions/timing.htm
Computer Aids for VLSI Design...
http://www.rulabinsky.com/cavd/text/chap06-5.html
...
http://www.scu.edu/engineering/centers/nano/upload/On-Chip%20Interconnects.
Helpme for ICverify...
http://www.scudc.scu.edu/mentortu/mg_icverify_01.html
...
http://www.scudc.scu.edu/mentortu/mg_icverify_03.html
EE560: Lab 4...
http://www.seas.upenn.edu/~ee560/lab/lab3_new.html
TM ...
http://www.sequencedesign.com/2_solutions/Columbus_RF.DataSheet.1.pdf
...
http://www.sigda.org/ispd2004/1999/slides/ispdstuff/ispdslides/hayashi.ppt
Implicit ...
http://www.sigda.org:82/Archives/ProceedingArchives/Compendiums/papers/2002
SiliconStrategies.com - Cadence Extends Leadership in Parasitic Extraction With ...
http://www.siliconstrategies.com/article/showArticle.jhtml?prid=25977
...
http://www.siliconstrategies.com/article/showArticle.jhtml
SiliconStrategies.com - Extraction tool for interconnects designs features per-h...
http://www.siliconstrategies.com/story/OEG20001228S0020
Silvaco - Products - DISCOVERY datasheet...
http://www.silvaco.com/products/parasiticExtraction/discovery/discoveryData
Silvaco...
http://www.silvaco.com/services/parasiticExtractionServices/par_extrct_data
Beginners' Guide to Electronics, Part 1 - Basic Components Explained...
http://www.sound.westhost.com/beginners.htm
4 ...
http://www.trans-mart.net/trial/trial/details/050301syno/ref.pdf
Resistance is Futile! ...
http://www.trilobyte.com/pdf/golson_snug99.pdf
linux software and linux documentation for all your needs : usinglinux.org...
http://www.usinglinux.org/man/ext.5.html
Design of VLSI Systems - Chapter 4...
http://www.vlsi.wpi.edu/webcourse/ch04/ch04.html
The Impacts of Process Technology Changes on Computer Architecture. ...
http://www.wam.umd.edu/~davewang/process_arch.pdf
Model ...
http://www.win.tue.nl/macsi-net/Events/Vandermeijs.pdf
Tool Helps Designers Find Interface Parasitics...
http://www.wsdmag.com/Articles/ArticleID/9034/9034.html
The Critical Importance of Test Chips in Validating New ...
http://www.xinitiative.org/img/arorapaper.pdf
NEC Chooses Celestry For Silicon Accurate Sign-off...
http://www10.edatoolscafe.com/nbc/articles/view_article.php?articleid=15449
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