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EECS 317 ...
http://bear.cwru.edu/eecs_317/eecs_317_20020308.pdf
http://genomebiology.com/2001/2/8/research/0032.1 ...
http://biomicro.mit.edu/education/Wong&Li.pdf
http://genomebiology.com/2001/2/8/research/0032.1 ...
http://biosun1.harvard.edu/complab/model%20validation%2C%20design%20issues.
29 septembre 2003 ...
http://cdfinfo.in2p3.fr/Downloads/elect/CARGESE.supports/CARGESE_DISTRI/PIG
Integrated Communications Design - Will the analog design flow catch up?...
http://cgw.pennnet.com/Articles/Article_Display.cfm?Section=Articles&Subsec
Prakash Patil Personal Portfolio...
http://communications.4jobs.com/PRAKASHHPATIL-RES
G U E S T E D I T O R ' S I N T R O D U C T I O N ...
http://csdl.computer.org/comp/mags/co/2005/02/r2036.pdf
ASPRO-216: A Standard-Cell Q.D.I. 16-Bit RISC Asynchronous Microprocessor...
http://csdl.computer.org/comp/proceedings/async/1998/8392/00/83920022abs.ht
Library Architecture Challenges for Cell-Based Design...
http://developer.intel.com/technology/itj/2004/volume08issue01/art05_librar
Standard Cell Library Characterization for Setting Current Limits for IDDQ Testi...
http://doi.ieeecomputersociety.org/10.1109/IDDQ.1996.557810
Using partitioning to help convergence in the standard-cell design automation me...
http://dx.doi.org/10.1145/309847.310005
ISD Archived Magazine Issues and Articles...
http://eedesign.com/editorial/1998/viewpoint9803.html
FOray: FOTree Design Notes...
http://foray.sourceforge.net/dev/fotree/
Practical Experiences with ...
http://lapwww.epfl.ch/people/ienne/reprints/ienne.dac98.pdf
Compact yet High-Performance (CyHP) Library for Short Time-to-Market with ...
http://lowpower.iis.u-tokyo.ac.jp/SPN/2000/20000121.pdf
Project Overview...
http://microsys6.engr.utk.edu/~cku/651/intro_ov.html
Introduction...
http://microsys6.engr.utk.edu/~nislam/1_1.htm
Section One: Chapter One...
http://nppp.jpl.nasa.gov/asic/Sect.1.1.html
Section Three: Chapter Two...
http://nppp.jpl.nasa.gov/asic/Sect.3.2.html
Section One: Chapter Five...
http://parts.jpl.nasa.gov/asic/Sect.1.5.html
Section Three: Chapter Two...
http://parts.jpl.nasa.gov/asic/Sect.3.2.html
Low-Power Low-Voltage Standard Cell Libraries with ...
http://patmos2001.eivd.ch/program/Repro%5CArt_9_4.pdf
Warrnambool Standard...
http://the.standard.net.au/articles/2005/02/11/1108061837468.html
...
http://uhavax.hartford.edu/ilumokanw/EE565INT.doc
46.2 ...
http://videos.dac.com/videos/40th/46/46_2/46_2.pdf
Magic...
http://vlsi.cornell.edu/magic/archive/2003/0350.html
Magic...
http://vlsi.cornell.edu/magic/archive/2003/0354.html
Standard Cell Based Design using Cadence PKS, Cadence Silicon Ensemble, Synopsys...
http://vlsi.ece.iit.edu/scells/flow/ece429_accupads/ece429_accupads.html
Standard Cell Based Design using Cadence PKS, Cadence Silicon ...
http://vlsi.ece.iit.edu/scells/flow/ece429_accupads/ece429_accupads.pdf
Reporting of Standard Cell Placement Results ...
http://vlsicad.cs.binghamton.edu/pubs/Madden010030.pdf
240 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEM...
http://vlsicad.cs.binghamton.edu/pubs/Madden020240.pdf
Reporting of Standard Cell Placement Results ...
http://vlsicad.cs.binghamton.edu/~pmadden/pubs/Madden010030.pdf
EE290 A: Advanced Topics in CAD ...
http://www-cad.eecs.berkeley.edu/~newton/Classes/EE290sp99/lectures/ee290aS
EE290 A: ...
http://www-cad.eecs.berkeley.edu/~newton/Classes/EE290sp99/lectures/ee290aS
...
http://www-unix.ecs.umass.edu/~alaffely/lect3_01.ppt
Web-based Intranet and Internet Information and Applications (1194.22)...
http://www.access-board.gov/sec508/guide/1194.22.htm
The High Speed Digital Design Seminar, pcb, electrical engineering, ee, high fre...
http://www.americomseminars.com/5outline.htm
Fabrix® RapidPlannerTM - Delivering Early ...
http://www.ammocore.com/whitepaper_rapidplanner.pdf
An Examination of and Response to “Auditory Standard Issues” by Dr. James Stuhmi...
http://www.arl.army.mil/ARL-Directorates/HRED/AHAAH/html_docs/Analysis_of_i
ASIC Design Guidelines ...
http://www.atmel.com/dyn/resources/prod_documents/doc1205.pdf
Power Electronic Converters for ...
http://www.btsdirectory.com/Inverter%20SDA%20Workshop_files/15_DushanBoroye
WHITE PAPER ...
http://www.cadence.com/whitepapers/Virtuoso_platformWP.pdf
Lib-ClinIC...
http://www.cadmos.com/10-23.htm
CS/EE 5710/6710 (home)...
http://www.cs.utah.edu/classes/cs5710
7 FPGAs and FPGA Design Issues...
http://www.cs.wisc.edu/~pfile/vortex/paper_noappendix/node41.html
Local Multipoint Distribution Service (LMDS) ...
http://www.cse.ohio-state.edu/~jain/cis788-99/ftp/lmds.pdf
( ESNUG 410 Item 1 ) -------------------------------------------- [04/02/03]...
http://www.deepchip.com/items/0410-01.html
DeepChip Homepage...
http://www.deepchip.com/posts/0361.html
eASIC Corporation...
http://www.easic.com/technolgy/Structured_eASIC.html
eASIC Corporation...
http://www.easic.com/technolgy/e_solutions.html
Routing ...
http://www.ece.msstate.edu/~reese/EE8273/lectures/stdcellroute/stdcellroute
EE 8273 VLSI Systems I...
http://www.ece.msstate.edu/~reese/EE8273/
EE 8273 VLSI Systems I...
http://www.ece.msstate.edu/~reese/EE8273
Slide Set 7 ...
http://www.ece.ubc.ca/~elec479/handouts/s7_1up.pdf
...
http://www.ece.utexas.edu/~weigl/Logic%20Synthesis%20-%20fina5l%20report.do
...
http://www.eda.org/dcwg/dcdl_spec
Impact of DFM and RET on Standard-Cell Design Methodology ...
http://www.eda.org/edps/edp03/submissions/PaulDeDoodPaperFinal.pdf
DIGITAL SYSTEM DESIGN - (E3.05 DSD) 1.1 DIGITAL SYSTEM DESIGN - (E3.05 DSD) 1.2 ...
http://www.ee.ic.ac.uk/pcheung/teaching/ee3_DSD/1&2-introduction%20&%20meth
Algorithms and Architectures for Low Power IC ...
http://www.ee.qub.ac.uk/dsp/research/vlsi/lpid/download/d11.pdf
...
http://www.ee.technion.ac.il/vlsi/async2000/presentation/HansJacobson.ppt
PLACE AND ROUTE FOR SECURE STANDARD ...
http://www.ee.ucla.edu/~tiri/files/cardis2004.pdf
Project Review: Clock and Logic Issues...
http://www.eecs.umich.edu/UMichMP/circ-clocklogic.html
EEDesign.com - Design-specific standard cells yield custom performance...
http://www.eedesign.com/showArticle.jhtml?articleID=20301126
Standard cell is broken...
http://www.eetimes.com/printableArticle?doc_id=OEG20030701S0036
MOS standard cell market review. MOS technology, end user markets and consumptio...
http://www.electronics.ca/reports/microelectronics/IN030887DE.html
Standard Cell Design Market Overview...
http://www.electronics.ca/reports/microelectronics/standard_cell_design.htm
Engineering Design & Practice Lab - Using Cadence...
http://www.eng.abdn.ac.uk/~eng186/eg3573/usingCadence.html
Focus on Social Issues - How does intelligent design apply to biology?...
http://www.family.org/cforum/fosi/origins/faqs/a0026510.cfm
Hewlett-Packard Journal: Shortening the time to volume production of high-perfor...
http://www.findarticles.com/p/articles/mi_m0HPJ/is_n1_v46/ai_16645523
Firelily Designs - Color Vision, Color Deficiency...
http://www.firelily.com/opinions/color.html
Workshop LOW POWER VLSI DESIGN, IIT Delhi...
http://www.fitt-iitd.org/new/workshop_vlsi.htm
Mixed Signal Standard Cell...
http://www.flextronicssemi.com/semi/flexsemi.nsf/Content/Mixed+Signal+Stand
Freescale Semiconductor, Inc. ...
http://www.freescale.com/files/soft_dev_tools/doc/white_paper/MSPCPORT-WP.p
Services & Products > Microelectronics & Electronic Devices > Microelectronics >...
http://www.fujitsu.com/us/services/edevices/microelectronics/accelarray/
http://genomebiology.com/2001/2/8/research/0032.1 ...
http://www.genomebiology.com/content/pdf/gb-2001-2-8-research0032.pdf
GIST - Integrated Circuit Design...
http://www.gist.edu.sg/ICD/icdPrg.htm
Design environment...
http://www.handshakesolutions.com/Products_Services/Design_environment/Inde
Hyson Cells features - design and practical issues...
http://www.hysoncells.co.za/features/featur1e.html
Institute of Atomic-Scale Engineering: The Overtool: A Proposed Universal Assemb...
http://www.iase.cc/overtool.htm
Continental Breakfast - 8:00AM - 9:00AM (Gateway Foyer) ...
http://www.iccad.com/archive/00tutorial.pdf
Library Architecture Challenges for Cell-Based Design...
http://www.intel.com/technology/itj/2004/volume08issue01/art05_library_arch
RF Manager jobs - Cleveland, OH...
http://www.jobvertise.com/job/1762437
Magma Boot Camp Agenda ...
http://www.magma-da.com/articles/BootCampAgenda-030705.pdf
Magma Design Automation, Inc. - Training...
http://www.magma-da.com/c/@26oHHiw8pg.9A/Pages/training.html
Mobile Phone Antennas and Human Health...
http://www.mcw.edu/gcrc/cop/cell-phone-health-FAQ/toc.html
MICRAM Microelectronic - ASIC Design...
http://www.micram-me.com/services/design05.htm
MOS standard cell market review. MOS technology, end user markets and consumptio...
http://www.microelectronics.ca/IN030887DE.html
Customer-Specific MOS Cell-Based Designs Destination : Japan...
http://www.microelectronics.ca/mos_cell_based.html
NiMH Application Manual...
http://www.moltechpower.com/techdata/appmanuals/NiMH_Application_Manual.htm
Standard Cell Library for MOSIS SCMOS...
http://www.mosis.com/Technical/Designsupport/std-cell-library-scmos.html
Standard Cell Library for MOSIS SCMOS...
http://www.mosis.org/Technical/Designsupport/std-cell-library-scmos.html
Full Custom Design Flow...
http://www.mosis.org/design/flows/design-flow-full-custom.html
ELECTRONIC DESIGN AUTOMATION...
http://www.nist.edu/ntcs/eda.htm
eda...
http://www.ntcsindia.com/training/eda.htm
The Hardware Design Challenge...
http://www.perforce.com/perforce/hardware.html
CadMOS Design Technology and Prolific Inc. Team to Ensure Noisefree Libraries...
http://www.prolificinc.com/presscadmos.html
SILICON VALLEY RESEARCH PARTNERS WITH PROLIFIC, INC....
http://www.prolificinc.com/presssvr.html
Model-based analysis of oligonucleotide arrays: model validation, design issues ...
http://www.pubmedcentral.nih.gov/articlerender.fcgi?tool=pubmed&pubmedid=11
Directory for Social Issues in the Design of Computing Technologies: Other_Techn...
http://www.rajivshah.com/directory/Other_Technologies/Telephone
EDN - FROM EDN EUROPE: Structured ASICs: More gain, less pain? - 8/7/2003 - EDN ...
http://www.reed-electronics.com/ednmag/index.asp?layout=article&articleId=C
EDN - Silicon segmentation - 9/18/2003 - EDN - CA321801...
http://www.reed-electronics.com/ednmag/index.asp?layout=article&stt=000&art
Semiconductor International - Ted Vucurevich, Cadence Design Systems, CTO - 2/1/...
http://www.reed-electronics.com/semiconductor/article/CA499658
IBM Research Projects Synthesis Publications...
http://www.research.ibm.com/da/logicpubs.html
Standard-cell-based design methodology for high-performance support chips...
http://www.research.ibm.com/journal/rd/414/kick.html
Standard-cell-based design methodology for high-performance support chips - Refe...
http://www.research.ibm.com/journal/rd/414/kickref.html
BNL C-AD/AP/49 ...
http://www.rhichome.bnl.gov/M4/AP_601.pdf
Cadence: Create Custom Layouts...
http://www.seas.upenn.edu/~eecad/cadence/layout.html
An ECL Logic Synthesis System...
http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac91/papers/1991/dac9
Partition-Driven Standard Cell Thermal Placement ...
http://www.sigda.org/Archives/ProceedingArchives/Ispd/Ispd2003/papers/2003/
INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN 1998...
http://www.sigda.org/ispd2004/1999/slides/slidelinks.html
SiliconStrategies.com - Silicon Metrics, Hitachi Team to Produce Signal Integrit...
http://www.siliconstrategies.com/article/showArticle.jhtml?prid=54126
SiliconStrategies.com - TSMC to distribute "free" libraries through Virage...
http://www.siliconstrategies.com/story/OEG20021209S0009
SNUG: Synopsys Users Group - Israel...
http://www.snug-universal.org/israel/israel.htm
300.twolf: SPEC CPU2000 Benchmark Description...
http://www.spec.org/cpu2000/CINT2000/300.twolf/docs/300.twolf.html
...
http://www.specbench.org/osg/cpu2000/CINT2000/300.twolf/docs/300.twolf.txt
Lecture 9: ...
http://www.stanford.edu/class/ee271/handouts/lect.09.pdf
Synopsys Partners: Strategic Alliances - TSMC and Synopsys...
http://www.synopsys.com/partners/tsmc/tsmc.html
Synopsys HSPICE The Gold Standard for Accurate Circuit Simulation...
http://www.synopsys.com/products/mixedsignal/hspice/hspice_ds.html
Synplicity: Products...
http://www.synplicity.com/products/structuredasic/
Tanner EDA Products - Digital Standard Cell Libraries...
http://www.tanner.com/EDA/products/tech_files_lib/dit_std_cell.htm
[Report] ASIC and SoC: A Paradigm Shift...
http://www.the-infoshop.com/study/bc11059_asic_soc_toc.html
CRM Software solutions - About Management...
http://www.uptilt.com/corp/company/management.html
SOC: Submicron Issues -> Detailed circuit verification vital for SoC...
http://www.us.design-reuse.com/articles/article2526.html
SoC IP Blocks Solve the 3G Power Management Issues...
http://www.us.design-reuse.com/articles/article8146.html
Trade-offs in high-performance comms...
http://www.us.design-reuse.com/articles/article8665.html
Technical Paper Presented at ...
http://www.viragelogic.com/upload/documents/MPFlexPaper1.pdf
Standard Cell...
http://www.virtual-silicon.com/standard_cell.cfm
Web design issues; What a semantic can represent...
http://www.w3.org/DesignIssues/RDFnot.html
W3C HTML Home Page...
http://www.w3.org/MarkUp
Performance, Implementation, and Design Notes...
http://www.w3.org/TR/REC-html40/appendix/notes.html
The Web Standards Project...
http://www.webstandards.org/
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